Design of parity testable combinational circuits

Design of Parity Testable Combinational Circuits

Towards automated evolutionary design of combinational circuits

In this paper we propose a methodology based on a genetic algorithm (GA) to automate the design of combinational logic circuits in which we aim to minimize the total number of gates used. Our results are compared against those produced by human designers and by another GA-based approach. We also analyze the importance of using a non-binary representation in this problem despite the commonly acc...

Evolutionary Multiobjective Design of Combinational Logic Circuits

In this paper, we propose an evolutionary multiobjective optimization approach to design combinational logic circuits. The idea is to use a population-based technique that considers outputs of a circuit as equality constraints that we aim to satisfy. A small sub-population is assigned to each objective. After one of these objectives is satisfied, its corresponding sub-population is merged with ...

The design of random-testable sequential circuits

In general, sequential circuits are considered not to be random-testable. since a required lest sequence may grow exponentially with the number of f1ipflops. and it is very unlikely that a certain sequence occurs at random. This problem can be solved by combining tWO tasks: I) A small pan of the f1ipflops are made directly accessible, for instance by a partial scan path or by a built-in self-te...

Design of Testable Reversible Memory Circuits

Quantum dot Cellular Automata (QCA) is the new possibility for the future of nano-electronic computing technology which employs the principle of quantum mechanics. This paper, contributes to the design of Memory circuits based on conservative reversible logic gates & also the design is made testable using two test vectors. The conservative logic gates dominates the classical gates in terms of t...